Semiconductor devices include various circuits according to the functions the device has been designed to perform. The circuits generally comprise memory arrays for storing data and logic circuits for performing the device design functions as well as controlling the overall functioning of all circuits in the semiconductor device.
A tester is used for testing the functions of the semiconductor device. To test the semiconductor device, a test program including test patterns designed to test the semiconductor device functions, is loaded into the tester and the tester applies the patterns to the semiconductor device. The results of the test are compared to expected responses and a determination is made as to whether or not the semiconductor has passed or failed the test.
Today's technology allows for some of the function of testing to be placed on the semiconductor device itself. For example, array built in self-test (ABIST) functions are used to test memory arrays and logic built in self-test (LBIST) functions are used to test logic functions.
A problem with testing today's large semiconductor devices, even using ABIST and LBIST, is providing the required test data to the device under test (DUT) and then collecting the results of the application of those tests. This is particularly difficult when the tests have to be applied at high speeds, and the test results have to be collected without interfering with the application of the test. An example is the expected signatures in a LBIST environment and bitmap data in an ABIST environment.
Collecting test data is further complicated by the fact that the amount of test data can be very large so that a large portion of tester time is spent in moving or waiting for data to be moved. Collecting test data is still further complicated when the resulting test data must be combined during a subsequent diagnostic phase and the final number of bits to be used by the diagnostics is substantially less than the number of bits retrieved from the DUT. This occurs most notably when embedded arrays are tested in a start-stop-retrieve mode, in which a test is partially applied, stopped, diagnostic data retrieved and another portion of the test applied and so on.
In more detail, collecting bit fail map data on embedded arrays from logic parts is a very slow process for testers. One current method is to run ABIST on an embedded array with the tester recording all the cycles that ABIST was in when fails occurred. Then, the test is repeated but with the tester stopping at the first cycle a fail occurred at. Then the fail is read out. In most logic designs, the test cycle must be repeated, from the beginning, for the next fail. If a fail bitmap could be built up and stored on the die, the fail data could be read out to the tester after all the tests were run and the need to repeat the tests from the beginning for each fail would be eliminated and the time for testing would be reduced.
Therefore, a need exists for a method of storing and retrieving test data as a function separate from the application of the test patterns, without interfering with the application of the test patterns or having to stop the tester to save the test results.